High-Performance Computing on the Intel® Xeon Phi™

How to Fully Exploit MIC Architectures

Nonfiction, Computers, Advanced Computing, Engineering, Computer Architecture, Computer Science, General Computing
Cover of the book High-Performance Computing on the Intel® Xeon Phi™ by Endong Wang, Qing Zhang, Bo Shen, Guangyong Zhang, Xiaowei Lu, Qing Wu, Yajuan Wang, Springer International Publishing
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Author: Endong Wang, Qing Zhang, Bo Shen, Guangyong Zhang, Xiaowei Lu, Qing Wu, Yajuan Wang ISBN: 9783319064864
Publisher: Springer International Publishing Publication: June 26, 2014
Imprint: Springer Language: English
Author: Endong Wang, Qing Zhang, Bo Shen, Guangyong Zhang, Xiaowei Lu, Qing Wu, Yajuan Wang
ISBN: 9783319064864
Publisher: Springer International Publishing
Publication: June 26, 2014
Imprint: Springer
Language: English

The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the Intel® Xeon Phi™ series products efficiently. To that end, it introduces some computing grammar, programming technology and optimization methods for using many-integrated-core (MIC) platforms and also offers tips and tricks for actual use, based on the authors’ first-hand optimization experience.

The material is organized in three sections. The first section, “Basics of MIC”, introduces the fundamentals of MIC architecture and programming, including the specific Intel MIC programming environment. Next, the section on “Performance Optimization” explains general MIC optimization techniques, which are then illustrated step-by-step using the classical parallel programming example of matrix multiplication. Finally, “Project development” presents a set of practical and experience-driven methods for using parallel computing in application projects, including how to determine if a serial or parallel CPU program is suitable for MIC and how to transplant a program onto MIC.

This book appeals to two main audiences: First, software developers for HPC applications – it will enable them to fully exploit the MIC architecture and thus achieve the extreme performance usually  required in biological genetics, medical imaging, aerospace, meteorology and other areas of HPC. Second, students and researchers engaged in parallel and high-performance computing – it will guide them on how to push the limits of system performance for HPC applications.

View on Amazon View on AbeBooks View on Kobo View on B.Depository View on eBay View on Walmart

The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the Intel® Xeon Phi™ series products efficiently. To that end, it introduces some computing grammar, programming technology and optimization methods for using many-integrated-core (MIC) platforms and also offers tips and tricks for actual use, based on the authors’ first-hand optimization experience.

The material is organized in three sections. The first section, “Basics of MIC”, introduces the fundamentals of MIC architecture and programming, including the specific Intel MIC programming environment. Next, the section on “Performance Optimization” explains general MIC optimization techniques, which are then illustrated step-by-step using the classical parallel programming example of matrix multiplication. Finally, “Project development” presents a set of practical and experience-driven methods for using parallel computing in application projects, including how to determine if a serial or parallel CPU program is suitable for MIC and how to transplant a program onto MIC.

This book appeals to two main audiences: First, software developers for HPC applications – it will enable them to fully exploit the MIC architecture and thus achieve the extreme performance usually  required in biological genetics, medical imaging, aerospace, meteorology and other areas of HPC. Second, students and researchers engaged in parallel and high-performance computing – it will guide them on how to push the limits of system performance for HPC applications.

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