Entropy Coders of the H.264/AVC Standard
Algorithms and VLSI Architectures
Nonfiction, Science & Nature, Technology, Telecommunications
| Author: | Xiaohua Tian, Thinh M. Le, Yong Lian | ISBN: | 9783642147036 |
| Publisher: | Springer Berlin Heidelberg | Publication: | October 17, 2010 |
| Imprint: | Springer | Language: | English |
| Author: | Xiaohua Tian, Thinh M. Le, Yong Lian |
| ISBN: | 9783642147036 |
| Publisher: | Springer Berlin Heidelberg |
| Publication: | October 17, 2010 |
| Imprint: | Springer |
| Language: | English |
This book presents a collection of algorithms and VLSI architectures of entropy (or statistical) codecs of recent video compression standards, with focus on the H.264/AVC standard. For any visual data compression scheme, there exists a combination of two, or all of the following three stages: spatial, temporal, and statistical compression. General readers are first introduced with the various algorithms of the statistical coders. The VLSI implementations are also reviewed and discussed. Readers with limited hardware design background are also introduced with a design methodology starting from performance-complexity analyses to software/hardware co-simulation. A typical design of the Contextbased Adaptive Binary Arithmetic Coding (CABAC) encoder is also presented in details. To support System-on-Chip design environment, the CABAC design is wrapped with a SoC-based Wishbone system bus interface.
This book presents a collection of algorithms and VLSI architectures of entropy (or statistical) codecs of recent video compression standards, with focus on the H.264/AVC standard. For any visual data compression scheme, there exists a combination of two, or all of the following three stages: spatial, temporal, and statistical compression. General readers are first introduced with the various algorithms of the statistical coders. The VLSI implementations are also reviewed and discussed. Readers with limited hardware design background are also introduced with a design methodology starting from performance-complexity analyses to software/hardware co-simulation. A typical design of the Contextbased Adaptive Binary Arithmetic Coding (CABAC) encoder is also presented in details. To support System-on-Chip design environment, the CABAC design is wrapped with a SoC-based Wishbone system bus interface.
