Intel Xeon Phi Coprocessor High Performance Programming

Nonfiction, Computers, Programming, Parallel Programming, Advanced Computing, Parallel Processing, General Computing
Cover of the book Intel Xeon Phi Coprocessor High Performance Programming by James Jeffers, James Reinders, Elsevier Science
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Author: James Jeffers, James Reinders ISBN: 9780124104945
Publisher: Elsevier Science Publication: February 11, 2013
Imprint: Morgan Kaufmann Language: English
Author: James Jeffers, James Reinders
ISBN: 9780124104945
Publisher: Elsevier Science
Publication: February 11, 2013
Imprint: Morgan Kaufmann
Language: English

Authors Jim Jeffers and James Reinders spent two years helping educate customers about the prototype and pre-production hardware before Intel introduced the first Intel Xeon Phi coprocessor. They have distilled their own experiences coupled with insights from many expert customers, Intel Field Engineers, Application Engineers and Technical Consulting Engineers, to create this authoritative first book on the essentials of programming for this new architecture and these new products.

This book is useful even before you ever touch a system with an Intel Xeon Phi coprocessor. To ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi coprocessors, or other high performance microprocessors. Applying these techniques will generally increase your program performance on any system, and better prepare you for Intel Xeon Phi coprocessors and the Intel MIC architecture.

  • A practical guide to the essentials of the Intel Xeon Phi coprocessor
  • Presents best practices for portable, high-performance computing and a familiar and proven threaded, scalar-vector programming model
  • Includes simple but informative code examples that explain the unique aspects of this new highly parallel and high performance computational product
  • Covers wide vectors, many cores, many threads and high bandwidth cache/memory architecture
View on Amazon View on AbeBooks View on Kobo View on B.Depository View on eBay View on Walmart

Authors Jim Jeffers and James Reinders spent two years helping educate customers about the prototype and pre-production hardware before Intel introduced the first Intel Xeon Phi coprocessor. They have distilled their own experiences coupled with insights from many expert customers, Intel Field Engineers, Application Engineers and Technical Consulting Engineers, to create this authoritative first book on the essentials of programming for this new architecture and these new products.

This book is useful even before you ever touch a system with an Intel Xeon Phi coprocessor. To ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi coprocessors, or other high performance microprocessors. Applying these techniques will generally increase your program performance on any system, and better prepare you for Intel Xeon Phi coprocessors and the Intel MIC architecture.

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