Low-Power CMOS Digital Pixel Imagers for High-Speed Uncooled PbSe IR Applications

Nonfiction, Science & Nature, Science, Physics, Solid State Physics, Technology, Electronics
Cover of the book Low-Power CMOS Digital Pixel Imagers for High-Speed Uncooled PbSe IR Applications by Josep Maria Margarit, Springer International Publishing
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Author: Josep Maria Margarit ISBN: 9783319499628
Publisher: Springer International Publishing Publication: December 29, 2016
Imprint: Springer Language: English
Author: Josep Maria Margarit
ISBN: 9783319499628
Publisher: Springer International Publishing
Publication: December 29, 2016
Imprint: Springer
Language: English

This book describes the development of a new low-cost medium wavelength IR (MWIR) monolithic imager technology for high-speed uncooled industrial applications. It takes the baton on the latest technological advances in the field of vapor phase deposition (VPD) PbSe-based MWIR detection accomplished by the industrial partner NIT S.L., adding fundamental knowledge on the investigation of novel VLSI analog and mixed-signal design techniques at circuit and system levels for the development of the readout integrated device attached to the detector. In order to fulfill the operational requirements of VPD PbSe, this work proposes null inter-pixel crosstalk vision sensor architectures based on a digital-only focal plane array (FPA) of configurable pixel sensors. Each digital pixel sensor (DPS) cell is equipped with fast communication modules, self-biasing, offset cancellation, analog-to-digital converter (ADC) and fixed pattern noise (FPN) correction. In-pixel power consumption is minimized by the use of comprehensive MOSFET subthreshold operation.

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This book describes the development of a new low-cost medium wavelength IR (MWIR) monolithic imager technology for high-speed uncooled industrial applications. It takes the baton on the latest technological advances in the field of vapor phase deposition (VPD) PbSe-based MWIR detection accomplished by the industrial partner NIT S.L., adding fundamental knowledge on the investigation of novel VLSI analog and mixed-signal design techniques at circuit and system levels for the development of the readout integrated device attached to the detector. In order to fulfill the operational requirements of VPD PbSe, this work proposes null inter-pixel crosstalk vision sensor architectures based on a digital-only focal plane array (FPA) of configurable pixel sensors. Each digital pixel sensor (DPS) cell is equipped with fast communication modules, self-biasing, offset cancellation, analog-to-digital converter (ADC) and fixed pattern noise (FPN) correction. In-pixel power consumption is minimized by the use of comprehensive MOSFET subthreshold operation.

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