Partial Reconfiguration on FPGAs

Architectures, Tools and Applications

Nonfiction, Science & Nature, Technology, Electronics, Circuits
Cover of the book Partial Reconfiguration on FPGAs by Dirk Koch, Springer New York
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Author: Dirk Koch ISBN: 9781461412250
Publisher: Springer New York Publication: July 25, 2012
Imprint: Springer Language: English
Author: Dirk Koch
ISBN: 9781461412250
Publisher: Springer New York
Publication: July 25, 2012
Imprint: Springer
Language: English

This is the first book to focus on designing run-time reconfigurable systems on FPGAs, in order to gain resource and power efficiency, as well as to improve speed.  Case studies in partial reconfiguration guide readers through the FPGA jungle, straight toward a working system.  The discussion of partial reconfiguration is comprehensive and practical, with models introduced together with methods to implement efficiently the corresponding systems.  Coverage includes concepts for partial module integration and corresponding communication architectures, floorplanning of the on-FPGA resources, physical implementation aspects starting from constraining primitive placement and routing all the way down to the bitstream required to configure the FPGA, and verification of reconfigurable systems.

View on Amazon View on AbeBooks View on Kobo View on B.Depository View on eBay View on Walmart

This is the first book to focus on designing run-time reconfigurable systems on FPGAs, in order to gain resource and power efficiency, as well as to improve speed.  Case studies in partial reconfiguration guide readers through the FPGA jungle, straight toward a working system.  The discussion of partial reconfiguration is comprehensive and practical, with models introduced together with methods to implement efficiently the corresponding systems.  Coverage includes concepts for partial module integration and corresponding communication architectures, floorplanning of the on-FPGA resources, physical implementation aspects starting from constraining primitive placement and routing all the way down to the bitstream required to configure the FPGA, and verification of reconfigurable systems.

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